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19.4
Input/Output Pins
The flash memory is controlled by means of the pins shown in table 19.2.
Table 19.2 Pin Configuration
Pin Name
I/O
RES
Input
MD2
Input
MD1
Input
MD0
Input
P52
Input
P51
Input
P50
Input
TxD1
Output
RxD1
Input
19.5
Register Descriptions
The flash memory has the following registers. For details on the system control register, refer to
section 3.2.2, System Control Register (SYSCR).
• Flash memory control register 1 (FLMCR1)
• Flash memory control register 2 (FLMCR2)
• Erase block register 1 (EBR1)
• Erase block register 2 (EBR2)
• RAM emulation register (RAMER)
19.5.1
Flash Memory Control Register 1 (FLMCR1)
FLMCR1 is a register that makes the flash memory transit to program mode, program-verify
mode, erase mode, or erase-verify mode. For details on register setting, refer to section 19.8,
Flash Memory Programming/Erasing.
Rev. 2.00, 05/03, page 652 of 820
Function
Reset
Sets this LSI's operating mode
Sets this LSI's operating mode
Sets this LSI's operating mode
Sets operating mode in programmer mode
Sets operating mode in programmer mode
Sets operating mode in programmer mode
Serial transmit data output
Serial receive data input
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