Figure 17.9 Operation Timing In Slave Transmit Mode (1) - Renesas H8S/2437 Hardware Manual

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
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Slave receive mode
SCL
(master output)
SDA
(master output)
SCL
(slave output)
SDA
(slave output)
TDRE
TEND
TRS
ICDRT
ICDRS
ICDRR
User
[2] Write data to ICDRT (data 1)
processing

Figure 17.9 Operation Timing in Slave Transmit Mode (1)

Slave transmit mode
9
1
2
Bit 7
Bit 6
A
Data 1
Data 1
3
4
5
Bit 5
Bit 4
Bit 3
Bit 2
[2] Write data to ICDRT (data 2)
Rev. 1.00, 09/03, page 497 of 704
6
7
8
9
A
Bit 1
Bit 0
Data 2
Data 2
[2] Write data to ICDRT (data 3)
1
Bit 7
Data 3

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