Figure 15.9 Slave Transmit Mode Operation Timing (1) - Renesas H8 Series Hardware Manual

16-bit single-chip microcomputer
Hide thumbs Also See for H8 Series:
Table of Contents

Advertisement

Slave receive mode
SCL
(Master output)
SDA
(Master output)
SCL
(Slave output)
SDA
(Slave output)
TDRE
TEND
TRS
ICDRT
ICDRS
ICDRR
User
[2] Write data to ICDRT (data 1)
processing

Figure 15.9 Slave Transmit Mode Operation Timing (1)

Slave transmit mode
9
1
2
Bit 7
Bit 6
A
Data 1
Data 1
[2] Write data to ICDRT (data 2)
3
4
5
6
Bit 5
Bit 4
Bit 3
Bit 2
Rev. 1.00 Aug. 28, 2006 Page 263 of 400
2
Section 15 I
C Bus Interface 2 (IIC2)
7
8
9
1
A
Bit 1
Bit 0
Bit 7
Data 2
Data 2
[2] Write data to ICDRT (data 3)
REJ09B0268-0100
Data 3

Advertisement

Table of Contents
loading

Table of Contents