Port E Data Register (Pedr); Port E Register (Porte) - Renesas H8S/2368 Series Hardware Manual

9.12.2

Port E Data Register (PEDR)

PEDR stores output data for the port E pins.
Bit Bit Name Initial Value
7 PE7DR 0
6 PE6DR 0
5 PE5DR 0
4 PE4DR 0
3 PE3DR 0
2 PE2DR 0
1 PE1DR 0
0 PE0DR 0
9.12.3

Port E Register (PORTE)

PORTE shows port E pin states.
PORTE cannot be modified.
Bit Bit Name Initial Value
7 PE7
—*
6 PE6
—*
5 PE5
—*
4 PE4
—*
3 PE3
—*
2 PE2
—*
1 PE1
—*
0 PE0
—*
Note: * Determined by the states of pins PE7 to PE0.
Rev. 2.00, 05/03, page 360 of 820
R/W Description
R/W Output data for a pin is stored when the pin function
is specified to a general purpose I/O.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W Description
R If a port E read is performed while PEDDR bits are
set to 1, the PEDR values are read. If a port E read
R
is performed while PEDDR bits are cleared to 0, the
R
pin states are read.
R
R
R
R
R