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The H8S/2368 Group are microcomputers (MCU) made up of the H8S/2600 CPU employing
Renesas Technology's original architecture as their cores, and the peripheral functions required to
configure a system.
The H8S/2600 CPU has an internal 32-bit configuration, sixteen 16-bit general registers, and a
simple and optimized instruction set for high-speed operation. The H8S/2600 CPU can handle a
16-Mbyte linear address space.
This LSI is equipped with direct memory access controller (DMAC) and data transfer controller
(DTC) bus masters, ROM and RAM memory, a 16-bit timer pulse unit (TPU), a programmable
pulse generator (PPG), 8-bit timers (TMR), a watchdog timer (WDT), serial communication
interfaces (SCI and IrDA), a 10-bit A/D converter, an 8-bit D/A converter, and I/O ports as on-
chip peripheral modules required for system configuration. I
included as an optional interface.
A high-functionality bus controller is also provided, enabling fast and easy connection of DRAM
and other kinds of memory.
A single-power flash memory (F-ZTAT
flexibility as it can be reprogrammed in no time to cope with all situations from the early stages of
mass production to full-scale mass production. This is particularly applicable to application
devices with specifications that will most probably change.
TM
Note: F-ZTAT
is a trademark of Renesas Technology Corp.
Target Users: This manual was written for users who will be using the H8S/2368 Group in the
design of application systems. Target users are expected to understand the
fundamentals of electrical circuits, logical circuits, and microcomputers.
Objective:
This manual was written to explain the hardware functions and electrical
characteristics of the H8S/2368 Group to the target users.
Refer to the H8S/2600 Series, H8S/2000 Series Programming Manual for a
detailed description of the instruction set.
Notes on reading this manual:
• In order to understand the overall functions of the chip
Read the manual according to the contents. This manual can be roughly categorized into parts
on the CPU, system control functions, peripheral functions and electrical characteristics.
Preface
2
TM
) version is available for this LSI's ROM. This provides
C bus interface 2 (IIC2) can also be
Rev. 2.00, 05/03, page vii of lii
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