Mode 7; Pin Functions; Table 3.2 Pin Functions In Each Operating Mode - Renesas H8S/2368 Series Hardware Manual

3.3.5

Mode 7

The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is enabled,
and the chip starts up in single-chip mode. External address space cannot be used in single-chip
mode.
The initial mode after a reset is single-chip mode, with all I/O ports available for use as
input/output ports. However, the mode can be switched to externally expanded mode by setting 1
to the EXPE bit of SYSCR and then the external address space is enabled. When externally
expanded mode is selected, all areas are initially designated as 16-bit access space. The functions
of pins in ports A to G are the same as in externally expanded mode with on-chip ROM enabled.
In the flash memory version, user program mode is entered by setting the SWE bit of FLMCR1 to
1.
3.3.6

Pin Functions

Table 3.2 shows the pin functions in each operating mode.
Table 3.2 Pin Functions in Each Operating Mode
Port
Port A PA7 to PA5
PA4 to PA0
Port B
Port C
Port D
Port E
Port F PF7, PF6
PF5, PF4
PF3
PF2 to PF0
Port G PG6 to PG1
PG0
Legend: P: I/O port
A: Address bus output
D: Data bus input/output
C: Control signals, clock input/output
Notes: *1 After reset
*2 Setting not allowed on no-ROM versions.
Mode 1 Mode 2
P * P *
1 1
/A /A
A A
A A
A A
D D
P/D * P *
1 1
/D
P/C * P *
1 1
/C
C C
P/C * P/C *
1 1
P * P *
1 1
/C /C
P * P *
1 1
/C /C
P/C * P/C *
1 1
Mode 3 * Mode 4 *
2
P * P *
1 1
/A /A
P * P *
1 1
/A /A
P * P *
1 1
/A /A
P *
1
/D D
P * P *
1 1
/D /D
P * P/C *
1 1
/C
C
P/C *
1
P *
1
/C
P * P *
1 1
/C /C
P *
1
/C
Rev. 2.00, 05/03, page 61 of 820
Mode 7 *
2 2
P *
1
/A
P *
1
/A
P *
1
/A
P *
1
/D
P *
1
/D
P *
1
/C
P *
1
/C