Figure 5.1 Block Diagram Of Interrupt Controller - Renesas H8S/2368 Series Hardware Manual

A block diagram of the interrupt controller is shown in figure 5.1.
NMI input
IRQ input
Internal
interrupt
sources
SWDTEND
to IICI1
Rev. 2.00, 05/03, page 80 of 820
INTM1 INTM0
INTCR
NMIEG
NMI input unit
IRQ input unit
ISR
ITSR ISCRL
SSIER
Interrupt controller
Legend
ISCRL: IRQ sense control register
IER: IRQ enable register
ISR: IRQ status register
IPR: Interrupt priority register
INTCR: Interrupt control register
ITSR: IRQ pin select register
SSIER: Software standby release IRQ enable register

Figure 5.1 Block Diagram of Interrupt Controller

IER Priority
determination
IPR
CPU
Interrupt
request
Vector
number
I
CCR
I2 to I0
EXR