Breqo Output Timing - Renesas H8S/2368 Series Hardware Manual

BREQO

BREQO Output Timing

BREQO BREQO
6.13.4
When the BREQOE bit is set to 1 and the BREQO signal is output, BREQO may go low before
the BACK signal.
This will occur if the next external access request or CBR refresh request occurs while internal bus
arbitration is in progress after the chip samples a low level of BREQ.
Rev. 2.00, 05/03, page 197 of 820