Usage Notes; Contention Between Tcnt Write And Clear; Contention Between Tcnt Write And Increment; Figure 12.10 Contention Between Tcnt Write And Clear - Renesas H8S/2368 Series Hardware Manual

12.8

Usage Notes

12.8.1

Contention between TCNT Write and Clear

If a timer counter clock pulse is generated during the T
takes priority, so that the counter is cleared and the write is not performed.
Figure 12.10 shows this operation.
φ
Address
Internal write signal
Counter clear signal
TCNT

Figure 12.10 Contention between TCNT Write and Clear

12.8.2

Contention between TCNT Write and Increment

If a timer counter clock pulse is generated during the T
takes priority and the counter is not incremented.
Figure 12.11 shows this operation.
Rev. 2.00, 05/03, page 488 of 820
state of a TCNT write cycle, the clear
2
TCNT write cycle by CPU
T T
1
TCNT address
N
state of a TCNT write cycle, the write
2
2
H'00