Table 7.9 Register Functions In Normal Mode - Renesas H8S/2368 Series Hardware Manual

16-bit single-chip microcomputer
Table of Contents

Advertisement

to a single transfer request, and this is executed the number of times specified in ETCRA. The
transfer source is specified by MARA, and the transfer destination by MARB. Table 7.9
summarizes register functions in normal mode.
Table 7.9
Register Functions in Normal Mode
Register
23
MARA
23
MARB
15
ETCRA
MARA and MARB specify the start addresses of the transfer source and transfer destination,
respectively, as 24 bits. MAR can be incremented or decremented by 1 or 2 each time a byte or
word is transferred, or can be fixed. Incrementing, decrementing, or holding a fixed value can be
set separately for MARA and MARB.
The number of transfers is specified by ETCRA as 16 bits. ETCRA is decremented by 1 each time
a transfer is performed, and when its value reaches H'0000 the DTE bit in DMABCRL is cleared
and transfer ends. If the DTIE bit in DMABCRL is set to 1 at this time, an interrupt request is sent
to the CPU or DTC. The maximum number of transfers, when H'0000 is set in ETCRA, is 65,536.
Figure 7.11 illustrates operation in normal mode.
Function
0
Source address
register
0
Destination
address register
0
Transfer counter Number of transfers Decremented every
Initial Setting
Start address of
transfer source
Start address of
transfer destination
Rev. 2.00, 05/03, page 241 of 820
Operation
Incremented/decremented
every transfer, or fixed
Incremented/decremented
every transfer, or fixed
transfer; transfer ends
when count reaches
H'0000

Advertisement

Table of Contents
loading

This manual is also suitable for:

H8s seriesH8s/2300 series

Table of Contents