Renesas H8S/2368 Series Hardware Manual page 259

Bit Bit Name
3 DTF3
2 DTF2
1 DTF1
0 DTF0
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
Description
•
Channel B
0000: Setting prohibited
0001: Activated by A/D converter conversion
end interrupt
0010: Activated by DREQ pin falling edge input
(detected as a low level in the first
transfer after transfer is enabled)
0011: Activated by DREQ pin low-level input
0100: Activated by SCI channel 0 transmission
complete interrupt
0101: Activated by SCI channel 0 reception
complete interrupt
0110: Activated by SCI channel 1 transmission
complete interrupt
0111: Activated by SCI channel 1 reception
complete interrupt
1000: Activated by TPU channel 0 compare
match/input capture A interrupt
1001: Activated by TPU channel 1 compare
match/input capture A interrupt
1010: Activated by TPU channel 2 compare
match/input capture A interrupt
1011: Activated by TPU channel 3 compare
match/input capture A interrupt
1100: Activated by TPU channel 4 compare
match/input capture A interrupt
1101: Activated by TPU channel 5 compare
match/input capture A interrupt
1110: Setting prohibited
1111: Setting prohibited
The same factor can be selected for more than
one channel. In this case, activation starts with
the highest-priority channel according to the
relative channel priorities. For relative channel
priorities, see section 7.5.12, Multi-Channel
Operation.
Rev. 2.00, 05/03, page 207 of 820