Expansion Slot Ac Timing - Renesas SH7727 General Information Manual

R0P7727TH003TRKE General Information Manual

9.5 Expansion Slot AC Timing

As shown in Figure 9.4, the SH7727 bus signal is output to the expansion slot via the bus buffer. For this
reason, the bus signal delays approx. 8nsec for the AC timing of the SH7727 bus. When designing the
daughter board, consider this delay. Figure 9.5 shows the basic bus timing of the SH7727.
For details on SH7727 bus timing, refer to the pertinent SH7727 Hardware Manual.
SH7727
Bus signal
Address bus
Control signal
Data bus
Inside T-Engine Board
Figure 9.4 Expansion Slot Bus Buffer Structure
Expansion slot
Bus buffer
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Daughter Board Design Guide