Mova Instruction; Table 2.15 Effective Address Calculation For Branch Instructions - Renesas H8SX/1500 Series Hardware Manual

Table 2.15 Effective Address Calculation for Branch Instructions

No. Addressing Mode and Instruction Format
Register indirect
1
op r
Program-counter relative with 8-bit displacement
2
op
disp
Program-counter relative with 16-bit displacement
op
disp
Program-counter relative with index register
3
op r
24-bit absolute address
4
op
32-bit absolute address
op
aa
Memory indirect
5
op aa
6 Extended memory indirect
op vec
2.8.13

MOVA Instruction

The MOVA instruction stores the effective address in a general register.
1. Firstly, data is obtained by the addressing mode shown in item 2of table 2.14.
2. Next, the effective address is calculated using the obtained data as the index by the addressing
mode shown in item 5 of table 2.14. The obtained data is used instead of the general register.
The result is stored in a general register. For details, see H8SX Family Software Manual.
Effective Address Calculation
31
31
31
31
31
Sign extension
31
Contents of general register (RL, R, or ER)
31
Zero
31
extension
aa
31
31
31
31
31
31
0
General register contents
0
PC contents
7 0
Sign extension
disp
0
PC contents
15 0
disp
0
Zero extension
×
2
0
PC contents
23 0
aa
0
aa
7 0
Zero extension aa
0
Memory contents
7
0
1 vec
Zero extension
×
2 or 4
0
0
Memory contents
Rev. 3.00 Mar. 14, 2006 Page 63 of 804
Section 2 CPU
Effective Address (EA)
31
31
+
31
+
31
+
31
31
31
31
REJ09B0104-0300
0
0
0
0
0
0
0
0