Advanced Mode; Figure 2.4 Exception Vector Table (Middle And Advanced Modes) - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer

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Section 2 CPU

Advanced Mode

The data area is extended to 4 Gbytes as compared with that in middle mode.

• Address Space

The maximum address space of 4 Gbytes can be linearly accessed. For individual areas, up to

16 Mbytes of the program area and up to 4 Gbytes of the data area can be allocated.

• Extended Registers (En)

The extended registers (E0 to E7) can be used as 16-bit registers, or as the upper 16-bit

segments of 32-bit registers or address registers.

• Instruction Set

All instructions and addressing modes can be used.

• Exception Vector Table and Memory Indirect Branch Addresses

In advanced mode, the top area starting at H'00000000 is allocated to the exception vector

table. One branch address is stored per 32 bits. The upper eight bits are ignored and the lower

24 bits are stored. The structure of the exception vector table is shown in figure 2.4.

The memory indirect (@@aa:8) and extended memory indirect (@@vec:7) addressing modes

are used in the JMP and JSR instructions. An 8-bit absolute address included in the instruction

code specifies a memory location. Execution branches to the contents of the memory location.

In advanced mode, an operand is a 32-bit (longword) operand, providing a 32-bit branch

address. The upper eight bits are reserved and assumed to be H'00.

Rev. 3.00 Mar. 14, 2006 Page 24 of 804

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Reset exception vector

Exception vector table

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