Advanced Mode; Figure 2.3 Exception-Handling Vector Table (Advanced Mode) - Renesas H8S/2437 Hardware Manual

2.2.2

Advanced Mode

• Address Space
Linear access is provided to a 16-Mbyte maximum address space.
• Extended Registers (En)
The extended registers (E0 to E7) can be used as 16-bit registers, or as the upper 16-bit
segments of 32-bit registers or address registers.
• Instruction Set
All instructions and addressing modes can be used.
• Exception-handling Vector Table and Memory Indirect Branch Addresses
In advanced mode the top area starting at H'00000000 is allocated to the exception-handling
vector table in units of 32 bits. In each 32 bits, the upper 8 bits are ignored and a branch
address is stored in the lower 24 bits (figure 2.3). For details of the exception-handling vector
table, see section 4, Exception Handling.
H'00000000
H'00000003
H'00000004
H'00000007
H'00000008
H'0000000B
H'0000000C
H'00000010

Figure 2.3 Exception-Handling Vector Table (Advanced Mode)

The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR instructions
uses an 8-bit absolute address included in the instruction code to specify a memory operand
that contains a branch address.
Rev. 1.00, 09/03, page 20 of 704
Reserved
Reset exception-handling vector
Reserved
(Reserved for system use)
(Reserved for system use)
Reserved
Exception-handling vector 1
Exception-handling
vector table