Figure 2 Mc68360 To Tms320C64X (Hpi32) Hpi Interface Block Diagram; Table 1. Mc68360 To Hpi Pin Connections - Texas Instruments TMS320C6000 Manual

Figure 2. MC68360 to TMS320C64x (HPI32) HPI Interface Block Diagram
HPI Pin MC68360 Pin
HCNTL[1:0] A[3:2]
HHWIL A[1]
HR/W R/W
HD[15:0] D[31:16]
HD[31:0] D[31:0]
HDS1 GND
HDS2 V
CC
HAS V
CC
HCS CSx
HBE0 GND
HBE1 GND
- CONFIG[2:0]
MC68360 (Host)
D[31:0]
R/W
A[3:2]
DSACK1
DSACK0
V CC
CSx
V
CONFIG2
CC
CONFIG1
GND
CONFIG0
GND
AVEC
GND
IRQx

Table 1. MC68360 to HPI Pin Connections

Address bits of MC68360 are used as control signals.
A[1] identifies the first or second halfword of transfer. Unused for HPI32 mode transfers.
Indicates a read or write access
MC68360 uses D[31:16] for 16-bit port interface and D[31:0] for 32-bit port interface.
HDS1 and HDS2 are internally exclusively-NORed. HDS1 and HDS2 are tied logic low
and high, respectively, to enable data strobe at all time.
See above.
Because host device MC68360 has separate address and data bus, HAS does not need
to be used. HAS is tied inactive high.
Any one of the chip-selects of MC68360 can be connected to HCS as the chip-select
signal. This also serves as the data-strobe signal in this case (because DS of MC68360
is not used as data strobe).
MC68360 does not have byte write enable signals that have the same timing as other
control signals. Therefore, HBE1 and HBE0 of HPI are tied low to enable host access
to both lower and upper bytes of the half-word during a write. TMS320C6211 does not
have HBE[1:0] signals.
See above.
Because CONFIG[2:1] is set to 10, the CPU is enabled and the MBAR register is at
0x003FF00.
16-bit interface
CONFIG[2:0]='101'
TMS320C64x
(HPI132 mode) HPI
32
HD[31:0]
HR/W
2
HCNTL[1:0]
HRDY
HCS
HDS1
GND
HDS2
V
C
C
HAS
V
C
C
HINT
Comments
32-bit interface
TMS320C6000 Host Port to MC68360 Interface
SPRA545A
CONFIG[2:0]='100'
3