Boot Host Wait (Hwait) Feedback Strobe - Analog Devices ADSP-BF506F Hardware Reference Manual

When the
BFLAG_FILL
tains the 32-bit fill value, which is most likely a zero.
If the
BFLAG_FIRST
next-DXE pointer for multi-DXE applications. For single-DXE applica-
tions the field points to the next free boot source address after the current
DXE's boot stream.

Boot Host Wait (HWAIT) Feedback Strobe

The feedback strobe is a handshake signal that is used to hold off
HWAIT
the host device from sending further data while the boot kernel is busy.
On ADSP-BF50x processors, this feature is implemented by a GPIO that
is toggled by the boot kernel as required. The
purpose.
The signal polarity of the
resistor in the 10 k
A pull-up resistor instructs the
the host is permitted to send header and footer data when
but should pause while
boot on other Blackfin products.
Similarly, a pull-down resistor programs active-low behavior.

Note that the
on ADSP-BF53x Blackfin processors. In the ADSP-BF50x proces-
sors, the meaning of the pulling resistor is inverted and
asserted by default during reset.
The boot kernel first senses the polarity on the respective
it enables the output driver but keeps the signal in its asserted state. The
signal is not released until the boot kernel is ready for data, or when a
receive DMA is started. As soon as the DMA completes,
active again.
ADSP-BF50x Blackfin Processor Hardware Reference
flag is set there is no payload. The argument con-
flag is set, the argument contains the relative
strobe is programmable by an external
HWAIT

range.
HWAIT
is high. This is the mode used in SPI slave
HWAIT
signal is implemented slightly differently than
HWAIT
System Reset and Booting
GPIO is used for this
PG3
signal to be active high. In this case
is low,
HWAIT
is
HWAIT
pin. Then
HWAIT
becomes
HWAIT
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