Block Headers - Analog Devices ADSP-BF506F Hardware Reference Manual

When the
BFLAG_INDIRECT
another memory block in L1 data bank A (by default, 0xFF80 7F00–
0xFF80 7FEF) for intermediate data storage. To avoid conflicts, the
utility ensures this region is booted last.
elfloader
The entire source code of the boot ROM is shipped with the CCES or
VisualDSP++ tools installation. Refer to the source code for any addi-
tional questions not covered in this manual. Note that minor maintenance
work may be done to the content of the boot ROM when silicon is
updated.

Block Headers

A boot stream consists of multiple boot blocks, as shown in
Every block is headed by a 16-byte block header. However, every block
does not necessarily have a payload, as shown in
0xEF00 0000
ON-CHIP
BOOT ROM
Figure 24-3. Booting Process
ADSP-BF50x Blackfin Processor Hardware Reference
flag for any block is set, the boot kernel uses
FLASH/PROM
LI MEMORY
BLOCK 1
BLOCK 3
APPLICATION
CODE/DATA
System Reset and Booting
Figure
Figure 24-4.
.LDR FILE
16-BYTE HEADER FOR BLOCK 1
BLOCK 1
16-BYTE HEADER FOR BLOCK 2
BLOCK 2
16-BYTE HEADER FOR BLOCK 3
BLOCK 3
16-BYTE HEADER FOR BLOCK n
BLOCK n
. . .
24-3.
24-11