Servicing Reset Interrupts - Analog Devices ADSP-BF506F Hardware Reference Manual

Reset and Power-up

Servicing Reset Interrupts

The processor services a reset event like other interrupts. The reset inter-
rupt has top priority. Only emulation events have higher priority. When
coming out of reset, the processor is in supervisor mode and has full access
to all system resources. The boot kernel can be seen as part of the reset ser-
vice routine. It runs at the top interrupt priority level.
Even when the boot process has finished and the boot kernel passes con-
trol to the user application, the processor is still in the reset interrupt. To
enter user mode, the reset service routine must initialize the
and terminate with an
For a programming example, see
Listing 24-1 and
handle the reset event. See Blackfin Processor Programming Reference for
details on user and supervisor modes.
Systems that do not work in an operating system environment may not
enter user mode. Typically, the interrupt level needs to be degraded down
to IVG15. Listing 24-3
accomplished.

Since the boot kernel is running at reset interrupt priority, NMI
events, hardware errors and exceptions are not serviced at boot
time. As soon as the reset service routine returns, the processor can
service the events that occurred during the boot sequence. It is rec-
ommended that programs install NMI, hardware error, and
exception handlers before leaving the reset service routine. This
includes proper initialization of the respective event vector registers
.
EVTx
24-8
instruction.
RTI
"Example System Reset" on page
Listing 24-2 on page 24-83
and Listing 24-4 on page 24-84
ADSP-BF50x Blackfin Processor Hardware Reference
RETI
show code examples that
show how this is
register
24-82.