24 SYSTEM RESET AND
BOOTING
This document contains material that is subject to change without notice.
The content of the boot ROM as well as hardware behavior may change
across silicon revisions. See the anomaly list for differences between silicon
revisions. This document describes functionality of silicon revision 0.0 of
the ADSP-BF50x processors.
Overview
When the
RESET
executing instructions from the on-chip boot ROM at address
0xEF00 0000.
The internal boot ROM includes a small boot kernel that loads applica-
tion data from an external memory or host device. The application data is
expected to be available in a well-defined format called the boot stream. A
boot stream consists of multiple blocks of data and special commands that
instruct the boot kernel how to initialize on-chip L1 memories as well as
off-chip volatile memories.
The boot kernel processes the boot stream block-by-block until it is
instructed by a special command to terminate the procedure and jump to
the application's programmable start address, which traditionally is at
0xFFA0 0000 in on-chip L1 memory. This process is called "booting."
ADSP-BF50x Blackfin Processor Hardware Reference
input signal releases, the processor starts fetching and
24-1
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