Pwmx (D/A) Counters H And L (Dacnth And Dacntl) - Renesas H8S/2437 Hardware Manual

9.3.1

PWMX (D/A) Counters H and L (DACNTH and DACNTL)

DACNT is a 14-bit readable/writable up-counter. The input clock is selected by the CKS bit in
DACR. DACNT functions as the timebase for both PWMX (D/A) channels. When a channel
operates with 14-bit accuracy, it uses all DACNT bits. When a channel operates with 12-bit
accuracy, it uses the lower 12 bits and ignores the upper two bits. DACNT cannot be accessed in
8-bit units. DACNT should always be accessed in 16-bit units. For details, see section 9.4, Bus
Master Interface.
• DACNTH
Bit Bit Name Initial Value
7 UC7 All 0
to to
0 UC0
• DACNTL
Bit Bit Name Initial Value
7 UC8 All 0
to to
2 UC13

1 1
0 REGS 1
R/W Description
R/W Lower Up-Counter
R/W Description
R/W Upper Up-Counter
R/W Reserved
This bit is always read as 1 and cannot be modified.
R/W Register Select
DADRA and DACR, and DADRB and DACNT, are
located at the same addresses. The REGS bit specifies
which registers can be accessed. When changing the
register to be accessed, set this bit in advance.
0: DADRA and DADRB can be accessed
1: DACR and DACNT can be accessed
Rev. 1.00, 09/03, page 227 of 704