A block diagram of the interrupt controller is shown in figure 5.1.
INTCR
NMI input
IRQ input
Internal
interrupt
sources
WOVI to
IICI3
Interrupt controller
[Legend]
ISCR:
IER:
ISR:
IPR:
INTCR: Interrupt control register
Rev. 1.00, 09/03, page 66 of 704
INTM1, INTM0
NMIEG
NMI input unit
IRQ input unit
ISR
IER
ISCR
IRQ sense control register
IRQ enable register
IRQ status register
Interrupt priority register
Figure 5.1 Block Diagram of Interrupt Controller
Priority
determination
IPR
CPU
Interrupt
request
Vector
number
I
CCR
I2 to I0
EXR