Figure 5.1 Block Diagram Of Interrupt Controller - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

Hide thumbs Also See for H8S Series:

Table of Contents

Section 5 Interrupt Controller

A block diagram of the interrupt controller is shown in figure 5.1.

Internal interrupt

SWDTEND to TEI2

IRQ sense control register

IRQ enable register

IRQ status register

Interrupt priority register

System control register

Rev. 6.00 Mar 15, 2006 page 68 of 570

REJ09B0211-0600

INTM1, INTM0

NMI input unit

IRQ input unit

Interrupt controller

Figure 5.1 Block Diagram of Interrupt Controller

Vector number

determination