A/D Control Register (Adcr) - Renesas H8 Series Hardware Manual

16.3.3

A/D Control Register (ADCR)

ADCR enables A/D conversion started by an external trigger signal.
Bit Bit Name
7 TRGE
6 to 4 —
3 —
2
1 —
0 —
Initial
Value R/W
0 R/W
All 1 —
0 R/W
0 R/W
1 R/W
0 R/W
Description
Trigger Enable
A/D conversion is started at the falling edge and the
rising edge of the external trigger signal (ADTRG)
when this bit is set to 1.
The selection between the falling edge and rising edge
of the external trigger pin (ADTRG) conforms to the
WPEG5 bit in the interrupt edge select register 2
(IEGR2)
Reserved
These bits are always read as 1.
Reserved
Do not set this bit to 1, though the bit is
readable/writable.
Reserved
These bits are always read as 1.
Reserved
Do not set this bit to 1, though the bit is
readable/writable.
Rev. 1.00 Aug. 28, 2006 Page 281 of 400
Section 16 A/D Converter
REJ09B0268-0100