Bus Size Setting Function; Bus Size Configuration Register (Bsc) - Renesas NU85E Preliminary User's Manual

32-bit microprocessor core
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4.5 Bus Size Setting Function

The bus size setting function uses the bus size configuration register (BSC) to set the VSB data bus size for each
CSn area selected by the chip select signals (VDCSZn) (see Figures 4-3 and 4-4) (n = 7 to 0).
The BSC register can be read or written in 16-bit units.
15
14
13
BS
BS
BS
BS
BSC
71
70
61
Bit position
Bit name
15 to 0
BSn1,
BSn0
Remark
n = 7 to 0
Note The after-reset value differs as follows according to the input levels to the IFINSZ1 and IFINSZ0 pins.
IFINSZ1
Low level
Low level
High level
Example In a CSn area, when the boot ROM is 16-bit width and memories in other areas are 32-bit width, start up
using 16-bit width in the initial state (input a low level to the IFINSZ1 pin and a high level to the IFINSZ0
pin) and then switch to 32-bit width via the BSC resister.
86
CHAPTER 4 BCU
Figure 4-7. Bus Size Configuration Register (BSC)
12
11
10
9
8
7
BS
BS
BS
BS
BS
60
51
50
41
40
31
Specifies the peripheral macro on the VSB that was located in the CSn area and the data bus
size.
BSn1
BSn0
0
0
0
1
1
0
1
1
IFINSZ0
Low level
32 bits
High level
16 bits
Low level
8 bits
Preliminary User's Manual A14874EJ3V0UM
6
5
4
3
2
BS
BS
BS
BS
BS
30
21
20
11
10
Function
VSB data bus size
8 bits
16 bits
32 bits
Setting prohibited
VSB data bus size
1
0
BS
BS
Address
After reset
01
00
FFFFF066H
Note
After-reset value
AAAAH
5555H
0000H

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