Figure 3.3 Flow Up To Interrupt Acceptance - Renesas H8/3847R Series Hardware Manual

8-bit single-chip microcomputer super low power
Table of Contents

Advertisement

Section 3 Exception Handling
Program execution state
IRRI0 = 1
IEN0 = 1
I = 0
PC contents saved
CCR contents saved
I ← 1
Branch to interrupt
handling routine
Legend:
PC:
Program counter
CCR:
Condition code register
I:
I bit of CCR
Rev. 6.00 Aug 04, 2006 page 110 of 680
REJ09B0145-0600
No
Yes
No
Yes
IRRI1 = 1
Yes
IEN1 = 1
Yes
No
Yes

Figure 3.3 Flow Up to Interrupt Acceptance

No
No
No
IRRI2 = 1
Yes
No
IEN2 = 1
Yes
IRRDT = 1
IENDT = 1
No
Yes
No
Yes

Advertisement

Table of Contents
loading

Table of Contents