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Register Name
Timer control/status register
Peripheral clock select register
PWM output enable register
PWM data polarity register
PWM register select
PWM data registers 7 to 0
PWMX (D/A) data register A
PWMX (D/A) control register
PWMX (D/A) data register B
PWMX (D/A) counter H
PWMX (D/A) counter L
Timer start register
Timer synchro register
Timer control register_0
Timer mode register_0
Timer I/O control register H_0
Timer I/O control register L_0
Timer interrupt enable register_0
Timer status register_0
Timer counter_0
Timer general register A_0
Timer general register B_0
Timer general register C_0
Timer general register D_0
Timer control register_1
Timer mode register_1
Timer I/O control register_1
Timer interrupt enable register_1
Timer status register_1
Number
Abbreviation
of Bits
TCSR
8
PCSR
8
PWOER
8
PWDPR
8
PWSL
8
PWDR7 to
8
PWDR0
DADRA
16
DACR
8
DADRB
16
DACNTH
8
DACNTL
8
TSTR
8
TSYR
8
TCR_0
8
TMDR_0
8
TIORH_0
8
TIORL_0
8
TIER_0
8
TSR_0
8
TCNT_0
16
TGRA_0
16
TGRB_0
16
TGRC_0
16
TGRD_0
16
TCR_1
8
TMDR_1
8
TIOR_1
8
TIER_1
8
TSR_1
8
Address Module
H'FFBC
WDT
(Read)
H'FFC0
PWM
H'FFC3
PWM
H'FFC5
PWM
H'FFC6
PWM
H'FFC7
PWM
H'FFC8
PWMX
H'FFC8
PWMX
H'FFCA
PWMX
H'FFCA
PWMX
H'FFCA
PWMX
H'FFCC
TPU
common
H'FFCD
TPU
common
H'FFD0
TPU_0
H'FFD1
TPU_0
H'FFD2
TPU_0
H'FFD3
TPU_0
H'FFD4
TPU_0
H'FFD5
TPU_0
H'FFD6
TPU_0
H'FFD8
TPU_0
H'FFDA
TPU_0
H'FFDC
TPU_0
H'FFDE
TPU_0
H'FFE0
TPU_1
H'FFE1
TPU_1
H'FFE2
TPU_1
H'FFE4
TPU_1
H'FFE5
TPU_1
Rev. 1.00, 09/03, page 645 of 704
Number of
Data Bus
Access
Width
States
16
2
8
2
8
2
8
2
8
2
8
2
8
4
8
2
8
4
8
4
8
4
16
2
16
2
16
2
16
2
16
2
16
2
16
2
16
2
16
2
16
2
16
2
16
2
16
2
16
2
16
2
16
2
16
2
16
2
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