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• P23/TIOCD0/TCLKB/A11/AD11
When the TIOCD0/TCLKBS bit in PTCNT2 is cleared to 0, this pin can be used as the
TIOCD0/TCLKB pin.
According to operating modes, the TPU channel 0 settings by the MD3 to MD0 bits in
TMDR_0, the IOD3 to IOD0 bits in TIORL_0, and the CCLR2 to CCLR0 bits in TCR_0, and
the combination of the TPSC2 to TPSC0 bits in TCR_0 to TCR_2, the TIOCD0/TCLKBS bit,
and the P23DDR bit, pin functions change as follows.
• Extended Mode (EXPE = 1)
Normal Extended Mode (ADMXE = 0)
P23DDR
Pin function
P23 input pin
• Single-Chip Mode (EXPE = 0)
TIOCD0/
TCLKBS
TPU channel
0 setting
P23DDR
Pin function
P23 input pin
TPU channel
(2)
0 setting
MD3 to MD0
IOD3 to IOD0
B'0000
B'0100
B'1xxx
CCLR2 to
CCLR0
Output
function
Rev. 1.00, 09/03, page 150 of 704
0
A11 output pin
0
Table below (2)
0
1
P23 output pin
1
TIOCD0 input pin*
TCLKB input pin*
(1)
B'0000
B'0001 to B'0011
B'0101 to B'0111
Output compare
output
Multiplex Extended Mode (ADMXE = 1)
1
1
TIOCD0 input pin*
2
TCLKB input pin*
Table below (1)
TIOCD0 output
P23 input pin
pin
2
(2)
(2)
B'0010
B'xx00
AD11 I/O pin
1
0
1
P23 output pin
(1)
(2)
B'0011
Other than B'xx00
Other than
B'110
B'110
PWM mode
2 output
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