Figure 24.12 Multiplex Bus Timing/3-State Access - Renesas H8S/2437 Hardware Manual

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
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t
CSD
,
,
t
AD
AD15 to AD0
,
AD15 to AD0

Figure 24.12 Multiplex Bus Timing/3-State Access

T 1
T 2
t
AHD
A15 to A0
t
t
AS2
AH2
t
AD
A15 to A0
T 3
T 4
t
t
RSD1
ACC4
t
ACC6
t
WRD1
t
WSW2
t
t
WDD
WDS
D15 to D0
Rev. 1.00, 09/03, page 683 of 704
T 5
t
RSD2
t
t
RDS
RDH
D15 to D0
t
WRD2
t
WDH

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