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• In download processing, all interrupts are not accepted. However, interrupt requests other than
the NMI are retained. Therefore, when the user procedure program is returned, the interrupts
occur.
• When the level-detection interrupt requests need to be retained, interrupts must be input until
the download is ended.
• When hardware standby mode is entered during download processing, the normal download
cannot be guaranteed in the on-chip RAM. Therefore, download must be executed again.
• Since a stack area of 128 bytes at the maximum is used, the area must be saved before setting
the SCO bit to 1.
4. Clear FKEY to H'00 for protection
5. Check the value of DPFR to confirm the download result
• Check the value of DPFR (one byte of start address of the download destination specified by
FTDAR). If the value is H'00, download has been performed normally. If the value is not H'00,
the source that caused download to fail can be investigated by the description below.
• If the value of DPFR is the same as that before downloading (e.g. H'FF), the address setting of
the download destination in FTDAR may be abnormal. In this case, confirm the setting of the
TDER bit in FTDAR.
• If the value of DPFR is different from that before downloading, check the SS and FK bits in
DPFR to ensure that the download program selection and FKEY setting were normal,
respectively.
6. Set the operating frequency to FPEFEQ for initialization
• The current frequency of the CPU clock is set to FPEFEQ (general register ER0).
The settable range of FPEFEQ is 5 to 20 MHz. When the frequency is set to out of this range,
an error is returned to FPFR of the initialization program and initialization is not performed.
For details on the frequency setting, see section 20.3.2 (2) (a), Flash Program/Erase Frequency
Parameter (FPEFEQ).
7. Execute initialization
When the programming program is downloaded, the initialization program is also downloaded
to the on-chip RAM. There is an entry point of the initialization program in the area from the
start address specified by FTDAR + 32 bytes of the on-chip RAM. The subroutine should be
called and initialization should be executed by using the following steps.
MOV.L
#DLTOP+32,ER2
JSR
@ER2
NOP
• The general registers other than R0L are retained in the initialization program.
• R0L is a return value of FPFR.
; Set entry address to ER2
; Call initialization routine
Rev. 1.00, 09/03, page 559 of 704
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