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7.12.4
Pin Functions
The relationship between register setting values and pin functions is as follows.
• PB7/TMI1_0/HSYNCI_0
According to the setting of the PB7DDR bit, the pin function is switched as shown below.
When the external clock is selected by the CKS2 to CKS0 bits in TCR of the TMR1_0, this pin
functions as the TMCI1_0 input pin. When the CCLR1 and CCLR0 bits in TCR of the
TMR1_0 are all set to 1, this pin functions as the TMRI1_0 input pin. When the SIMOD1 bit
(IHI signal) in TCONRI of the timer connection_0 is set to 1, this pin functions as the
HSYNCI_0 input pin.
PB7DDR
Pin function
• PB6/FTIA_0/VSYNCI_0
According to the setting of the PB6DDR bit, the pin function is switched as shown below.
When the ICIAE bit in TIER of the FRT_0 is set to 1, this pin functions as the FTIA_0 input
pin. When the SIMOD1 and SIMOD0 bits (IVI signal) in TCONRI of the timer connection_0
are all set to 1, this pin functions as the VSYNCI_0 input pin.
PB6DDR
Pin function
• PB5/FTID_0/CSYNCI_0
According to the setting of the PB5DDR bit, the pin function is switched as shown below.
When the ICIDE bit in TIER of the FRT_0 is set to 1, this pin functions as the FTID_0 input
pin. When the SIMOD1 and SIMOD0 bits (IHI signal) in TCONRI of the timer connection_0
are set to 01, this pin functions as the CSYNCI_0 input pin.
PB5DDR
Pin function
0
PB7 input pin
TMI1_0 input pin
HSYNCI_0 input pin
0
PB6 input pin
FTIA_0 input pin
VSYNCI_0 input pin
0
PB5 input pin
FTID_0 input pin
CSYNCI_0 input pin
1
PB7 output pin
1
PB6 output pin
1
PB5 output pin
Rev. 1.00, 09/03, page 207 of 704
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