Renesas H8S/2437 Hardware Manual page 18

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
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Section 16 Serial Communication Interface (SCI) ............................................425
16.1 Features............................................................................................................................. 425
16.2 Input/Output Pins .............................................................................................................. 427
16.3 Register Descriptions ........................................................................................................ 428
16.3.1 Receive Shift Register (RSR) .............................................................................. 428
16.3.2 Receive Data Register (RDR) .............................................................................. 428
16.3.3 Transmit Data Register (TDR)............................................................................. 428
16.3.4 Transmit Shift Register (TSR) ............................................................................. 429
16.3.5 Serial Mode Register (SMR) ............................................................................... 429
16.3.6 Serial Control Register (SCR).............................................................................. 431
16.3.7 Serial Status Register (SSR) ................................................................................ 433
16.3.8 Serial Interface Mode Register (SCMR).............................................................. 435
16.3.9 Bit Rate Register (BRR) ...................................................................................... 436
16.4 Operation in Asynchronous Mode .................................................................................... 442
16.4.1 Data Transfer Format........................................................................................... 443
Mode.................................................................................................................... 444
16.4.3 Clock.................................................................................................................... 445
16.4.4 SCI Initialization (Asynchronous Mode) ............................................................. 446
16.4.5 Serial Data Transmission (Asynchronous Mode) ................................................ 447
16.4.6 Serial Data Reception (Asynchronous Mode)...................................................... 449
16.5 Multiprocessor Communication Function......................................................................... 453
16.5.1 Multiprocessor Serial Data Transmission ............................................................ 455
16.5.2 Multiprocessor Serial Data Reception ................................................................. 456
16.6 Operation in Clocked Synchronous Mode ........................................................................ 459
16.6.1 Clock.................................................................................................................... 459
16.6.2 SCI Initialization (Clocked Synchronous Mode) ................................................. 459
16.6.3 Serial Data Transmission (Clocked Synchronous Mode) .................................... 460
16.6.4 Serial Data Reception (Clocked Synchronous Mode).......................................... 463
(Clocked Synchronous Mode) ............................................................................. 465
16.7 Interrupt Sources............................................................................................................... 467
16.8 Usage Notes ...................................................................................................................... 469
16.8.1 Module Stop Mode Setting .................................................................................. 469
16.8.2 Break Detection and Processing .......................................................................... 469
16.8.3 Mark State and Break Sending............................................................................. 469
(Clocked Synchronous Mode Only) .................................................................... 469
16.8.5 Relation between Writing to TDR and TDRE Flag ............................................. 469
16.8.6 SCI Operations during Mode Transitions ............................................................ 470
16.8.7 Switching from SCK Pins to Port Pins ................................................................ 473
Rev.1.00, 09/03, page xviii of xxxviii

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