Figure 12.4 8-Bit Register Access Operation [Bus Master ↔ Tmdr (Lower 8 Bits)]; Figure 12.5 8-Bit Register Access Operation [Bus Master ↔ Tcr And Tmdr (16 Bits)] - Renesas H8S/2437 Hardware Manual

Internal data bus
H
Bus
L
master
Figure 12.4 8-Bit Register Access Operation [Bus Master ↔
Internal data bus
H
Bus
L
master
Figure 12.5 8-Bit Register Access Operation [Bus Master ↔
Rev. 1.00, 09/03, page 326 of 704
Bus interface
Bus interface
TMDR
↔ TMDR (Lower 8 Bits)]
↔ ↔
TCR TMDR
↔ TCR and TMDR (16 Bits)]
↔ ↔
Module
data bus
Module
data bus