10.4
Operation
10.4.1
Pulse Output
Figure 10.2 shows an example of 50%-duty pulses output with an arbitrary phase difference.
When a compare match occurs while the CCLRA bit in TCSR is set to 1, the OLVLA and
OLVLB bits are inverted by software.
H'FFFF
OCRA
OCRB
H'0000
FTOA
FTOB
FRC
Figure 10.2 Example of Pulse Output
Counter clear
Rev. 1.00, 09/03, page 251 of 704