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• Extended Mode (EXPE = 1)
Normal Extended Mode (ADMXE = 0)
P25DDR
Pin function
P25 input pin
• Single-Chip Mode (EXPE = 0)
TIOCB1/
TCLKCS
TPU channel 1
setting
P25DDR
Pin function
P25 input pin
TPU channel 1
(2)
setting
MD3 to MD0
IOB3 to IOB0
B'0000
B'0100
B'1xxx
CCLR1,
CCLR0
Output
function
[Legend]
x: Don't care
Notes: 1. When TIOCB1/TCLKCS = 0, MD3 to MD0 = B'0000 or B'01xx, and IOB3 to IOB0 =
B'10xx, this pin functions as the TIOCB1 input pin.
2. When TIOCB1/TCLKCS = 0 and TPSC2 to TPSC0 in TCR_0 or TCR2 = B'111, this pin
functions as the TCLKC input pin. When TIOCB1/TCLKCS = 0 and phase-count mode
is set to the TCR channel 2, this pin functions as the TCLKC input pin.
Rev. 1.00, 09/03, page 148 of 704
0
A13 output pin
0
Table below (2)
0
1
P25 output pin
1
TIOCB1 input pin*
TCLKC input pin*
(1)
B'0000, B'01xx
B'0001 to B'0011
B'0101 to B'0111
Output compare
output
Multiplex Extended Mode (ADMXE = 1)
1
1
TIOCB1 input pin*
2
TCLKC input pin*
Table below (1)
TIOCB1 output
pin
2
(2)
(2)
B'0010
B'xx00
AD13 I/O pin
1
0
P25 input pin
P25 output pin
(1)
B'0011
Other than B'xx00
Other than
B'10
PWM mode
2 output
1
(2)
B'10
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