Port 2 Data Register (P2Dr); Port 2 Register (Port2) - Renesas H8S/2437 Hardware Manual

7.3.2

Port 2 Data Register (P2DR)

P2DR stores output data for the port 2 pins.
Bit Bit Name
7 P27DR
6 P26DR
5 P25DR
4 P24DR
3 P23DR
2 P22DR
1 P21DR
0 P20DR
7.3.3

Port 2 Register (PORT2)

PORT2 reflects the pin state in port 2 and cannot be modified.
Bit Bit Name
7 P27
6 P26
5 P25
4 P24
3 P23
2 P22
1 P21
0 P20
Note: * Determined by the states of the P27 to P20 pins.
Rev. 1.00, 09/03, page 144 of 704
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Initial Value R/W
*
R
*
R
*
R
*
R
*
R
*
R
*
R
*
R
Description
P2DR stores output data for the port 2 pins that are
used as the general output ports.
Description
When this register is read, the bit that is set in
P2DDR is read as the value of P2DR. The bit
that is cleared in P2DDR is read as the pin
state.