t
CSD
,
,
AD15 to AD0
,
AD15 to AD0
Rev. 1.00, 09/03, page 682 of 704
T 1
T 2
t
AHD
t
AD
A15 to A0
t
AS2
t
AD
A15 to A0
Figure 24.11 Muliplex Bus Timing/2-State Access
T 3
t
RSD1
t
WRD2
t
AH2
t
WDD
T 4
t
t
ACC2
RSD2
t
t
t
ACC6
RDS
RDH
D15 to D0
t
WRD2
t
WSW1
t
WDH
D15 to D0