Table of Contents
Advertisement
Register Name
2
I
C bus control register B_2
2
I
C bus mode register_2
2
I
C bus interrupt enable register_2 ICIER_2
2
I
C bus status register_2
Slave address register_2
2
I
C transmit data register_2
2
I
C receive data register_2
2
I
C bus control register A_3
2
I
C bus control register B_3
2
I
C bus mode register_3
2
I
C bus interrupt enable register_3 ICIER_3
2
I
C bus status register_3
Slave address register_3
2
I
C transmit data register_3
2
I
C receive data register_3
2
I
C status register A_2
Slave address register A_2
Slave address register B_2
Slave address mask register_2
2
I
C status register A_3
Slave address register A_3
Slave address register B_3
Slave address mask register_3
Bus control register
Area control register A1
Area control register A2
Area control register A3
Timer counter
Timer counter
Timer control/status register
Rev. 1.00, 09/03, page 644 of 704
Number
Abbreviation
of Bits
ICCRB_2
8
ICMR_2
8
8
ICSR_2
8
SAR_2
8
ICDRT_2
8
ICDRR_2
8
ICCRA_3
8
ICCRB_3
8
ICMR_3
8
8
ICSR_3
8
SAR_3
8
ICDRT_3
8
ICDRR_3
8
ICSRA_2
8
SARA_2
8
SARB_2
8
SAMR_2
8
ICSRA_3
8
SARA_3
8
SARB_3
8
SAMR_3
8
BCR
8
BCRA1
8
BCRA2
8
BCRA3
8
TCNT
16
TCNT
8
TCSR
16
Address
Module
H'FF99
IIC3_2
H'FF9A
IIC3_2
H'FF9B
IIC3_2
H'FF9C
IIC3_2
H'FF9D
IIC3_2
H'FF9E
IIC3_2
H'FF9F
IIC3_2
H'FFA0
IIC3_3
H'FFA1
IIC3_3
H'FFA2
IIC3_3
H'FFA3
IIC3_3
H'FFA4
IIC3_3
H'FFA5
IIC3_3
H'FFA6
IIC3_3
H'FFA7
IIC3_3
H'FFA8
IIC3_2
H'FFA9
IIC3_2
H'FFAA
IIC3_2
H'FFAB
IIC3_2
H'FFAC
IIC3_3
H'FFAD
IIC3_3
H'FFAE
IIC3_3
H'FFAF
IIC3_3
H'FFB0
BSC
H'FFB1
BSC
H'FFB2
BSC
H'FFB3
BSC
H'FFBC
WDT
(Write)
H'FFBD
WDT
(Read)
H'FFBC
WDT
(Write)
Number of
Data Bus
Access
Width
States
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
16
2
16
2
16
2
Advertisement
Table of Contents
