Operation Timing; Frc Increment Timing; Figure 10.3 Increment Timing With Internal Clock Source; Figure 10.4 Increment Timing With External Clock Source - Renesas H8S/2437 Hardware Manual

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
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10.5

Operation Timing

10.5.1

FRC Increment Timing

Figure 10.3 shows the FRC increment timing with an internal clock source. Figure 10.4 shows the
increment timing with an external clock source. The pulse width of the external clock signal must
be at least 1.5 system clocks (φ). The counter will not increment correctly if the pulse width is
shorter than 1.5 system clocks (φ).
φ
Internal clock
FRC input
clock
FRC

Figure 10.3 Increment Timing with Internal Clock Source

φ
External clock
input pin
FRC input
clock
FRC

Figure 10.4 Increment Timing with External Clock Source

Rev. 1.00, 09/03, page 252 of 704
N – 1
N
N
N + 1
N + 1

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