Table of Contents
Advertisement
17.2
Input/Output Pins
Table 17.1 shows the pin configuration of the I
Table 17.1 Pin Configuration
Name
Symbol
Serial clock
SCL0
Serial data
SDA0
Serial clock
SCL1
Serial data
SDA1
Serial clock
SCL2
Serial data
SDA2
Serial clock
SCL3
Serial data
SDA3
Note: The pin symbols are represented as SCL and SDA; channel numbers are omitted in this
manual.
17.3
Register Descriptions
The IIC3 has the following registers for each channel.
• I
2
C bus control register A (ICCRA)
• I
2
C bus control register B (ICCRB)
• I
2
C bus mode register (ICMR)
• I
2
C bus interrupt enable register (ICIER)
• I
2
C bus status register (ICSR)
• I
2
C bus status register A (ICSRA)
• Slave address register (SAR)
• Slave address register A (SARA)
• Slave address register B (SARB)
• Slave address mask register (SAMR)
• I
2
C bus transmit data register (ICDRT)
• I
2
C bus receive data register (ICDRR)
• I
2
C bus shift register (ICDRS)
Rev. 1.00, 09/03, page 478 of 704
2
C bus interface 3.
I/O
Function
I/O
IIC3_0 serial clock input/output
I/O
IIC3_0 serial data input/output
I/O
IIC3_1 serial clock input/output
I/O
IIC3_1 serial data input/output
I/O
IIC3_2 serial clock input/output
I/O
IIC3_2 serial data input/output
I/O
IIC3_3 serial clock input/output
I/O
IIC3_3 serial data input/output
Advertisement
Table of Contents
