Section 21 Clock Pulse Generator; Figure 21.1 Block Diagram Of Clock Pulse Generator - Renesas H8S/2437 Hardware Manual

This LSI incorporates a clock pulse generator which generates the system clock (φ) and internal
clock. The clock pulse generator consists of an oscillator, duty adjustment circuit, and divider.
Figure 21.1 shows a block diagram of the clock pulse generator.
XTAL
Oscillator
EXTAL
[Legend]
SCKCR: System clock control register

Figure 21.1 Block Diagram of Clock Pulse Generator

The internal frequency is changed by software according to the settings of the system clock
control register (SCKCR).
CPG0500A_000020020300

Section 21 Clock Pulse Generator

Duty
adjustment
circuit
SCKCR
SCK2 to SCK0
Divider
System clock Internal clock
To pin To peripheral modules
Rev. 1.00, 09/03, page 611 of 704