Conflict Between Ocr Write And Compare-Match; Figure 10.19 Conflict Between Ocr Write And Compare-Match (When Automatic Addition Function Is Not Used) - Renesas H8S/2437 Hardware Manual

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
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10.7.3

Conflict between OCR Write and Compare-Match

If a compare-match occurs during the state after an OCRA or OCRB write cycle, the write takes
priority and the compare-match signal is disabled. Figure 10.19 shows the timing for this type of
conflict.
If automatic addition of OCRAR and OCRAF to OCRA is selected, and a compare-match occurs
in the cycle following the OCRA, OCRAR, and OCRAF write cycle, the OCRA, OCRAR, and
OCRAF write takes priority and the compare-match signal is disabled. Consequently, the result of
the automatic addition is not written to OCRA. Figure 10.20 shows the timing for this type of
conflict.
Figure 10.19 Conflict between OCR Write and Compare-Match
Write cycle of OCR
T 1
φ
Address
OCR address
Internal write
signal
FRC
OCR
Compare-match
signal
(When Automatic Addition Function is not Used)
T 2
N
N + 1
N
M
Write data
Disabled
Rev. 1.00, 09/03, page 263 of 704

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