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• P94/HWR
According to the operating mode and the setting of the P94DDR bit, the pin function is
switched as shown below.
P94DDR
Pin function
• P93/RD
According to the operating mode and the setting of the P93DDR bit, the pin function is
switched as shown below.
P93DDR
Pin function
• P92/CS1/ExTIOCB2/ExTCLKD
When the TIOCB2/TCLKDS bit in PTCNT2 is set to 1, this pin can be used as the
ExTIOCB2/ExTCLKD2 pin.
According to operating modes, the TPU channel 2 settings by the CS1E bit, the MD3 to MD0
bits in TMDR_2, the IOB3 to IOB0 bits in TIOR_2, and the CCLR1 and CCLR0 bits in
TCR_2, and the combination of the TPSC2 to TPSC0 bits in TCR_0, the TIOCB2/TCLKDS
bit, and the P92DDR bit, the pin function is switched as shown below.
• Extended Mode (EXPE = 1)
CS1E
TIOCB2/TCLKDS
TPU channel 2 setting
P92DDR
Pin function
Rev. 1.00, 09/03, page 194 of 704
Extended Mode (EXPE = 1)
HWR output pin
Extended Mode (EXPE = 1)
RD output pin
0
Single-chip
operation
CS1 output pin
Single-Chip Mode (EXPE = 0)
0
P94 input pin
Single-Chip Mode (EXPE = 0)
0
P93 input pin
0
Table below (2)
CS1 output pin
ExTIOCB2 input pin*
ExTCLKD input pin*
1
P94 output pin
1
P93 output pin
1
1
Table below (1)
CS1 output pin
1
2
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