Index - Renesas H8S/2437 Hardware Manual

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
Table of Contents

Advertisement

14-Bit PWM Timer (PWMX)................. 225
16-Bit Count Mode ................................. 287
16-Bit Free-Running Timer (FRT) ......... 239
16-Bit Timer Pulse Unit (TPU)............... 299
16-Bit, 2-State Access Space .................. 107
16-Bit, 3-State Access Space .................. 110
2fH Modification .................................... 387
8-Bit PWM Timer (PWM)...................... 217
8-Bit Timer (TMR) ................................. 267
8-Bit, 2-State Access Space .................... 105
8-Bit, 3-State Access Space .................... 106
A/D conversion time............................... 515
A/D Converter ........................................ 507
A/D Converter Activation....................... 349
Acknowledge .................................. 475, 492
ADCR ............................. 513, 638, 649, 660
ADCSR ........................... 511, 638, 649, 660
additional pulse ....................................... 224
ADDR ............................. 510, 637, 649, 660
Address Space........................................... 22
Addressing Modes .................................... 43
Absolute Address .................................. 44
Immediate ............................................. 45
Memory Indirect ................................... 45
Program-Counter Relative .................... 45
Register Direct ...................................... 43
Register Indirect.................................... 43
Register Indirect with Displacement..... 43
Register indirect with post-
decrement.............................................. 44
Register indirect with pre-
decrement.............................................. 44
ADI ......................................................... 517
ASTCR ..................................................... 95
Asynchronous Mode ............................... 442
basic pulse............................................... 223
Bcc ...................................................... 31, 39
bit rate ..................................................... 436
Boot Mode .............................................. 551

Index

BRR ................................ 436, 636, 648, 659
Buffer Operation .....................................334
Carrier frequency ....................................219
Cascaded Connection ..............................287
Cascaded Operation ................................337
CBLANK Output ....................................398
Clamp Waveform Generation .................382
Clear Timing ...........................................408
Clock Pulse Generator ............................611
Clocked Synchronous Mode ...................459
CMIA ......................................................291
CMIA0 ....................................................291
CMIA1 ....................................................291
CMIAX ...................................................291
CMIAY ...................................................291
CMIB ......................................................291
CMIB0 ....................................................291
CMIB1 ....................................................291
CMIBX ...................................................291
CMIBY ...................................................291
Communications Protocol.......................585
Compare-Match Count Mode .................288
Condition Field .........................................42
Condition-Code Register (CCR) ...............26
conversion cycle......................................233
CPU Operating Modes ..............................18
Advanced Mode....................................20
Normal Mode........................................18
Crystal Oscillator ....................................614
data direction register..............................131
data register .............................................131
Download pass/fail result parameter .......542
Effective Address Extension .....................42
ERI0 ........................................................468
ERI1 ........................................................468
ERI2 ........................................................468
Error Protection.......................................579
Exception Handling.............................57, 58
Interrupts...............................................61
Rev. 1.00, 09/03, page 699 of 704

Advertisement

Table of Contents
loading

Table of Contents