Conflict Between Frc Write And Increment; Figure 10.18 Frc Write-Increment Conflict - Renesas H8S/2437 Hardware Manual

10.7.2

Conflict between FRC Write and Increment

If an FRC increment pulse is generated during the state after an FRC write cycle, the write takes
priority and FRC is not incremented. Figure 10.18 shows the timing for this type of conflict.
Rev. 1.00, 09/03, page 262 of 704
Write cycle of FRC
T 1
φ
Address
Internal write
signal
FRC input
clock
FRC

Figure 10.18 FRC Write-Increment Conflict

T 2
FRC address
N
Write data
M