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6.5.5
Wait Control
When accessing the external address space, this LSI can extend the bus cycle by inserting the wait
states (T
). Ways of inserting wait states: Program wait insertion, pin wait insertion using the
W
WAIT pin, and the combination of program wait and the WAIT pin.
In Normal Extended Mode:
1. Program Wait Mode
When the external address is accessed in the program wait mode, the T
states which are set by the WCn1 and WCn0 pins of the BCRAn, is always inserted between
the T
and the T
states.
2
3
2. Pin Wait Mode
A specified number of wait states T
when accessing the external address space. The number of wait states T
settings of the WCn1 and WCn0 bits. If the WAIT pin is low at the falling edge of φ in the last
T
or T
state, another T
2
W
until it goes high.
Pin wait mode is useful when inserting four or more T
of T
states to be inserted for each external device.
W
3. Pin Auto-Wait Mode
A specified number of wait states T
accessing the external address space if the WAIT pin is low at the falling edge of φ in the last
T
state. The number of wait states T
2
Even if the WAIT pin is held low, T
states.
Pin auto-wait mode enables the low-speed memory interface only by inputting the chip select
signal to the WAIT pin.
Figure 6.25 shows an example of wait state insertion timing in pin wait mode.
The settings after a reset are: 3-state access, 3-state program wait insertion, and WAIT pin
input disabled.
are always inserted between the T
W
state is inserted. If the WAIT pin is held low, T
W
are inserted between the T
W
is specified by the settings of the WCn1 and WCn0 bits.
W
states are inserted only up to the specified number of
W
of the number of
W
state and T
2
is specified by the
W
W
states, or when changing the number
W
state and T
2
Rev. 1.00, 09/03, page 125 of 704
state
3
states are inserted
state when
3
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