Table of Contents
Advertisement
• P61/FTOB_1/D1
The pin function is switched as shown below according to the combination of the operating
mode, the OEB bit in TOCR of the FRT_1, and the P61DDR bit.
• Extended Mode (EXPE = 1)
Bus width*
OEB
P61DDR
Pin function
Note:
* When the ABW3 to ABW1 bits in BCRA3 to BCRA1 are all set to 1, bus width is 8 bits,
if any are cleared to 0, bus width is 16 bits.
• Single-Chip Mode (EXPE = 0)
OEB
P61DDR
Pin function
• P60/FTOA_1/D0
The pin function is switched as shown below according to the combination of the operating
mode, the OEA bit in TOCR of the FRT_1, and the P60DDR bit.
• Extended Mode (EXPE = 1)
Bus width*
OEA
P60DDR
Pin function
Note:
* When the ABW3 to ABW1 bits in BCRA3 to BCRA1 are all set to 1, bus width is 8 bits,
if any are cleared to 0, bus width is 16 bits.
• Single-Chip Mode (EXPE = 0)
OEA
P60DDR
Pin function
Rev. 1.00, 09/03, page 180 of 704
Normal Extended Mode (ADMXE = 0)
16-bit
D1 I/O pin
All 0
0
P61 input pin
Normal Extended Mode (ADMXE = 0)
16-bit
D0 I/O pin
0
P60 input pin
8-bit
Single-chip operation
1
P61 output pin
8-bit
Single-chip operation
All 0
1
P60 output pin
Multiplex Extended Mode
(ADMXE = 1)
Single-chip operation
At least one bit is set to 1
FTOB_1 output pin
Multiplex Extended Mode
(ADMXE = 1)
Single-chip operation
At least one bit is set to 1
FTOA_1 output pin
Advertisement
Table of Contents
