Figure 6.9 Bus Timing For 16-Bit, 2-State Access Space (Word Access) - Renesas H8S/2437 Hardware Manual

Address bus
D15 to D8
Read
D7 to D0
Write
D15 to D8
D7 to D0
Note: n = 1 to 3

Figure 6.9 Bus Timing for 16-Bit, 2-State Access Space (Word Access)

Bus cycle
T T
1 2
Valid
Valid
Rev. 1.00, 09/03, page 109 of 704
Valid
Valid