Figure 12.7 Free-Running Counter Operation - Renesas H8S/2437 Hardware Manual

• Free-Running Count Operation and Periodic Count Operation
Immediately after a reset, the TPU's TCNT counters are all designated as free-running
counters. When the relevant bit in TSTR is set to 1, the corresponding TCNT counter starts up-
count operation as a free-running counter. When TCNT overflows (from H'FFFF to H'0000),
the TCFV bit in TSR is set to 1. If the value of the corresponding TCIEV bit in TIER is 1 at
this point, the TPU requests an interrupt. After overflow, TCNT starts counting up again from
H'0000.
Figure 12.7 illustrates free-running counter operation.
TCNT value
H'FFFF
H'0000
CST bit
TCFV
When compare match is selected as the TCNT clearing source, TCNT for the relevant channel
performs periodic count operation. TGR for setting the period is designated as an output
compare register, and counter clearing by compare match is selected by means of bits CCLR2
to CCLR0 in TCR. After the settings have been made, TCNT starts up-count operation as a
periodic counter when the corresponding bit in TSTR is set to 1. When the count value
matches the value in TGR, the TGF bit in TSR is set to 1 and TCNT is cleared to H'0000.
If the value of the corresponding TGIE bit in TIER is 1 at this point, the TPU requests an
interrupt. After a compare match, TCNT starts counting up again from H'0000.
Figure 12.8 illustrates periodic counter operation.
Rev. 1.00, 09/03, page 328 of 704

Figure 12.7 Free-Running Counter Operation

Time