Internal Synchronization Signal Generation (Ihg/Ivg/Cl4 Signal Generation); Figure 13.13 Fall Modification And Ihi Synchronization Timing Chart; Table 13.9 Examples Of Tcr, Tcsr, And Tcorb Settings - Renesas H8S/2437 Hardware Manual

Table 13.9 Examples of TCR, TCSR, and TCORB Settings

Register Bit
TCR of TMR1 7
6
5
4, 3
2 to 0
TCSR of TMR1 3 to 0
TCORB of TMR1 H'03
(example)
IHI signal
IVI signal (PDC signal)
IVO signal
(without fall modification,
with IHI synchronization)
IVO signal
(with fall modification,
without IHI synchronization)
IVO signal
(with fall modification
and IHI synchronization)

Figure 13.13 Fall Modification and IHI Synchronization Timing Chart

13.4.6

Internal Synchronization Signal Generation (IHG/IVG/CL4 Signal Generation)

By using the timer connection, FRT, and TMRY, it is possible to automatically generate internal
signals (IHG and IVG signals) corresponding to the IHI and IVI signals. As the IHG signal is
synchronized with the rise of the IVG signal, the IHG signal period must be made a divisor of the
IVG signal period in order to keep it constant. In addition, the CL4 signal can be generated in
synchronization with the IHG signal. Figure 13.14 shows a block diagram for IHG signal
generation and figure 13.15 shows a block diagram for IVG signal generation.
Abbreviation Contents Description
CMIEB 0
CMIEA 0
OVIE 0
CCLR1, 11
CCLR0
CKS2 to 101
CKS0
OS3 to OS0 0011
1001
Compare-match on the 4th (example) rise of the IHI signal after the
rise of the inverse of the IVI signal
Interrupts due to compare-match and
overflow are disabled
TCNT is cleared by the rising edge of the
external reset signal (inverse of the IVI
signal)
TCNT is incremented on the rising edge
of the external clock (IHI signal)
Not changed by compare-match B; output
inverted by compare-match A (toggle
output)
When TCORB < TCORA, 1 output on
compare-match B, 0 output on
compare-match A
2
1
TCNT
0
Rev. 1.00, 09/03, page 391 of 704
5
4
3
TCNT = TCORB (3)